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Photonics Integrated Circuits, so-called PICs, include multiple photonic and electronic functions in one single chip and enable faster and more efficient devices. To ensure the functional integrity and performance of the final products, testing the PICs already at wafer or die level is key. Hence, testing still remains a challenge, especially in high-volume wafer production. But there is some light at the end of the tunnel.

Join our webinar to learn how optical and electrical functions of PICs can be tested efficiently, about the challenges of testing at wafer level and how advanced test solutions lead to higher overall yields. Find out:

• what the challenges of PIC testing are, especially at wafer level
• how standardization can guide the way to HVM testing
• why functional tests of PIC are so important, especially at wafer level
• how testing optical and photonic functions in parallel can make your wafer production more cost effective
• how to eliminate the need for active alignment on a chip-by-chip basis.

Get a taste of it

Good to have full knowledge of your known-good-dies in an early stage of the wafer production process. Foundries and test houses need to test thousands of PICs a day in a time-saving manner. Not an easy task, considering that there is no standardized way yet to test comparable to the methods developed the IC ecosystem and used for decades.

In the Jenoptik talk, we will discuss a possibility to achieve this goal. Imagine you could test optical and electrical functionalities of Photonic Integrated Circuits (PICs) with just one probe card! And this one is running on existing standard IC wafer probers and IC test equipment. This is possible with Jenoptik´s UFO Probe® Card. Whether it is a cantilever or vertical version, it combines proven needle technology with a novel optical concept, that needs no active alignment.